1. Field of the Invention
The present invention relates to a microcomputer, and more specifically to an input/output circuit which is provided in a microcomputer and which has a function of initializing an input/output terminal at the time of resetting.
2. Description of Related Art
In an input/output circuit used in a conventional microcomputer, an internal bus is connected through an output latch and an output buffer to an input/output terminal, and the input/output terminal is also connected to an input buffer and a bus drive circuit to the internal bus. In addition, an input/output switchover circuit is connected to the internal bus, and generates an input/output switchover signal to the output buffer and the input buffer so as to selectively activate either the output buffer or the input buffer. The output latch and the input/output switchover circuit are initialized by a reset signal generated by a reset circuit.
In the above mentioned input/output circuit of the conventional microcomputer, since attention has not been paid to the timings of applying the reset signal to the output latch and the input/output switchover circuit, there is possibility that the timing of the initialization of the output latch is deviated from the timing of the initialization of the input/output switchover circuit because of a propagation delay of the reset signal and other factors. This means that the moment the output signal on the output terminal is caused to change in response to the reset signal is out of time with the moment the input/output switchover signal is caused to change in response to the reset signal. This becomes a problem when the input/output switchover circuit is initialized at a timing delayed from the initialization of the output latch.
In brief, assume that when the signal of "1" is outputted from the input/output terminal, the reset circuit outputs the active reset signal to the output latch and the input/output switchover circuit. At this time, the output latch is initialized so as to output an output data signal of "0", which is supplied through the output buffer to the input/output terminal. Thereafter, with a delayed time, the input/output switchover circuit is initialized so as to activate the input buffer and to inactivate the output buffer, namely, to change the input/output terminal from the output mode to the input mode. In this time sequence, just after the output data signal of the output latch is brought into "0", since the input/output terminal has not yet changed from the output mode to the input mode, the output data signal of "0" is supplied through the output buffer to the input/output terminal. As result, after the resetting operation is started, the output signal on the input/output terminal is caused to charged from "1" to "0" even for a moment, and therefore, the data signal which is different from that before the resetting operation is outputted from the input/output terminal. This is a problem.